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  1 of 12 note: some revisions of this device may incorporate deviations from published specifications known as errata. multiple revisions of any device may be simultaneously available through vario rev: 080206 general description the DS2714 is ideal for standalone charging of 1 to 4 aa or aaa nimh ?loose? cells. nicd cells can also be charged. temperature, voltage and charge time are monitored to provide proper fast charging control algorithms for nickel metal hydride (nimh) batteries. battery tests are included to detect defective or inappropriate cells such as alkaline primary batteries. the DS2714 supports a parallel charging topology, with independent monitoring and control of each cell. applications desktop/standalone chargers (aaa/aa) digital still cameras music players games toys charge topology features  charges 1 to 4 nimh cells  detects and avoids charging alkaline cells  pre-charges deeply depleted cells  fast charges nimh with -  v termination sensitivity of 2mv (typ)  monitors voltage, temperature and time for safety and secondary termination  works with regulated charge current source  drives pnp type pass element  compatible with integrated primary-side pwm controllers  20-pin tssop package ordering information part marking pin-package DS2714e+ DS2714 20 tssop DS2714e+t&r DS2714 20 tssop tape-and-reel + denotes lead-free package. pin configuration DS2714 quad loose cell nimh charge r www.maxim-ic.com 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 cc1 cc2 cc3 cc4 led1 led2 vss led3 led4 dmsel ctst tmr vdd vss vp1 vp2 vp3 thm2 vp4 thm1 DS2714 controlled current source gnd 4-cell nimh charger tssop
DS2714: quad loose cell nimh charger 2 of 12 absolute maximum ratings voltage range on any pin relative to v ss -0.3v to +6v voltage on dmsel v dd + 0.3v continuous sink current cc1-4, led1-4 20ma operating temperature range -40c to +85c storage temperature range -55c to +125c soldering temperature see ipc/jedecj-std-020a stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of t he specifications is not implied. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. recommended dc operating conditions (4.0v  v dd  5.5v; t a = -20  c to +70  c) parameter symbol conditions min typ max units supply voltage v dd (note 1) 4.0 5.5 v input voltage range ledx, dmsel -0.3 5.5 v dc electrical characteristics (4.0v  v dd  5.5v; t a = -20  c to +70  c. unless otherwise noted.) parameter symbol conditions min typ max units supply current, v dd i dd operating mode 500 750  a  output voltage low, cc1-4. led1-4 v ol1 vdd = 5.0v, i ol = 20ma (note 1) 1.0 v leakage current, cc1-4 led1-4 i lkg vdd = 5.0v, output inactive -1 +1  a threshold voltage, -  v termination v -  v after t tho 1.0 2.0 3.0 mv mode test current, dmsel i mtst pulse high/low once <5ms after power-up - 5 15  a input logic high, dmsel, v ih (note 1) v dd - 0.2v v input logic low, dmsel, v il (note 1) 0.2 v input leakage current, dmsel i il1 after power-up mode select, dmsel = v dd or v ss -1 +1  a threshold voltage, cell test accuracy v ctst-acc r tmr = 80k  -15 15 % threshold voltage, cell test range v ctst-range 32 400 mv threshold voltage, cell voltage low v bat-low cc1 = cc2 = hi-z (note 1, 2) 0.9 1.0 1.1 v threshold voltage, cell voltage max1 v bat-max1 cc1 = cc2 = hi-z (note 1, 2) 1.55 1.65 1.75 v threshold voltage, cell voltage max2 v bat-max2 cc1, cc2 active (note 1, 2) 1.64 1.75 1.86 v threshold voltage, thermistor - min v thm-min (note 1, 2, 6) v dd x 0.73 v threshold voltage, thermistor - max v thm-max (note 1, 2, 6) 0.30 v dd x 0.33 0.36 v threshold voltage, thermistor - stop v thm-stop (note 1, 2, 6) v dd x 0.29 v threshold current, tmr pin suspend i tmr-sus 0.1 0.5  a
DS2714: quad loose cell nimh charger 3 of 12 parameter symbol conditions min typ max units presence test current, vp1-4 i ptst 10 15  a reverse leakage current, vp1, vp2, vp3, vp4 i lkgr v dd = 0v, vpx = 1.5v 2  a electrical characteristics: timing (4.0v  v dd  5.5v; t a = -20  c to +70  c. unless otherwise noted.) parameter symbol conditions min typ max units internal timebase period t base (note 5) 0.48 s internal timebase accuracy -10 +10 % duty factor, fast charge df1 ccx 0.234 duty factor, pre- charge/top-off df2 ccx 0.0625 duty factor, maintenance charge df3 ccx note 4 0.0078 cell test interval t ctst (note 3) 31 s pre-charge time-out t pchg v cell < v bat-min 30.6 34 37.4 minutes fast charge termination hold-off period t tho 3.6 4 4.4 minutes fast charge flat voltage time-out t flat v cell not increasing 14.4 16 17.6 minutes charge timer accuracy -5 +5 % charge timer range t ctmr-range 0.5 10 h note 1: voltages relative to v ss . note 2: specification applicable during charge cycle with t a = 0  c to +70  c. note 3: one time slot out of every 16 available slots gets a cell test. note 4: one time slot out of every 32 available time slots gets a charge pulse. note 5: 0.48 seconds is one charge time slot. a complete cycle of 4 time slots (one charge time slot per cell) is 1.92 sec. note 6: v thm-min, v thm-max, and v thm-stop are fixed ratios of v dd . their ranges never overlap. note 7: i mtst current is applied as a source current and as a sink current within 5ms after power-up.
DS2714: quad loose cell nimh charger 4 of 12 pin description pin name function 1 cc1 charge control 1. turn on and off the charge pnp for cell 1. 2 cc2 charge control 2. turn on and off the charge pnp for cell 2. 3 cc3 charge control 3. turn on and off the charge pnp for cell 3. 4 cc4 charge control 4. turn on and off the charge pnp for cell 4. 5 led1 led 1. open drain output for led. display cell 1 status. 6 led2 led 2. open drain output for led. display cell 2 status. 7 v ss device ground. return current path for ledx pins. both vss pins must be connected to ground. 8 led3 led 3. open drain output for led. display cell 3 status. 9 led4 led 4. open drain output for led. display cell 4 status. 10 dmsel display mode select. select the led blink rate. 11 ctst cell test resistor. cell test threshold set. 12 tmr timer resistor. charge timer set. 13 v dd power-supply input. chip supply input (4.0v to 5.5v). 14 v ss device ground. internally connected to pin 7. both vss pins must be connected to ground. 15 vp1 voltage sense 1. positive terminal sense input for cell 1. 16 vp2 voltage sense 2. positive terminal sense input for cell 2. 17 vp3 voltage sense 3. positive terminal sense input for cell 3. 18 vp4 voltage sense 4. positive terminal sense input for cell 4. 19 thm1 thermister 1. thermister input for cell 1 and 2. 20 thm2 thermister 2. thermister input for cell 3 and 4.
DS2714: quad loose cell nimh charger 5 of 12 figure 1. block diagram state machine voltage and temperature measurement charge timer bias vp1-vp4 cc2 led1 tmr vdd led2 thm 1 z-test scaler ctst cc1 dmsel suspend oscillator presence test pre-charge fast charge & cell tests top-off charge maintenance charge cc3 cc4 led3 led4 thm 2 vss vss 0.1ua
DS2714: quad loose cell nimh charger 6 of 12 figure 2. state diagram por standby power ccx = hi-z ledx = hi-z vdd > 4.0v presence test ccx = hi-z ledx = no battery v bat < 1.65v t < pctimeout or v off < 1v v bat > 1.65v or t < 0c or t > 45c prechg ccx = active 6.25% ledx = charging fault standby power ccx = hi-z ledx = fault fail: v on -v off > v ctst cell test ccx = hi-z ledx = charging t > 50 fast chg ccx = active 23.4% ledx = charging t < fast timeout topoff chg ccx = active 6.25% ledx = charging t < topoff timeout -  v detect or t > fast timeout maint ccx = active 1/128 ledx = maintenance t > 50 or t > topoff timeout t > pctimeout or t > 50 or v on > 1.75v v on > 1.75v v on > 1.75v (asynchronously from anywhere) pass 16 clock interval v off > 1v and t < pctimeout and t < 50c v off > 1.65v v bat > 1.75v note: v bat = cell voltage not in charge state . v off = open circuit cell voltage . v on = closed circuit cell voltage .
DS2714: quad loose cell nimh charger 7 of 12 figure 3. application example: regulated current source charger 1 2 3 4 5 6 9 10 cc1 cc2 cc3 cc4 led1 led2 vss led3 led4 dmsel ctst tmr vdd vss vp1 vp2 vp3 thm2 vp4 thm1 vdd +5vdc current source 330  330  330  330         103at-2 103at-2 fcx718 fcx718 fcx718 fcx718   100  100  100  100 
DS2714: quad loose cell nimh charger 8 of 12 detailed description charge algorithm overview a charge cycle begins in one of three ways: with the application of power to the DS2714 with cell(s) already inserted, with the detection of cell insertion after power-up, or when exiting suspend mode with cell(s) inserted. the charge cycle begins with pre-charge qualification to prevent fast charging of deeply depleted cells or charging under extreme temperature conditions. pre-charging is performed at a reduced rate until the cell being charged reaches v bat-low (1v). the algorithm proceeds to a fast charge phase which includes cell tests to avoid accidental charging of alkaline cells or nimh cells which are worn-out or damaged. fast charging continues as long as the cell temperature is less than 50c (based on thermistor sensors thm 1, 2), the open circuit cell voltage(s) are between v bat-low (1.0v) and v bat-max1 (1.65v) and the closed ciruit cell voltage(s) are less than v bat-max2 (1.75v). fast charging terminates by the -  v (negative delta voltage) or flat voltage method. the top-off charge phase follows to completely charge the cell. after the top-off charge timer expires, the maintenance charge phase continues indefinitely to keep the cells fully charged. maximum voltage, temperature and charge time monitoring during all charge phases act as secondary or safety termination methods to provide additional protection from overcharge. a cell voltage greater than v bat-max2 (1.75v) will result in a fault condition, and temperature greater than 50c (see table 1) will result in either fault or maintenance depending on which charge state the device was last in. each cell is monitored independently, and the charge phase of each cell is independently controlled. if a cell is removed while being charged, the algorithm for that cell slot is completely reset to its presence test state without affecting the charge control states of the other cells. charge configuration the DS2714 supports four slot standalone chargers. it alternates charge to the four slots every two seconds, with one half second available to each cell. removal or insertion of a cell into the charger does not disturb the charge timing or charge rates of the other cells. charge pulses are fed alternately to each cell under the control of the ccx pins so that the charge regimes occur in parallel. the duty cycle on the ccx pins are completely independent of one another. transitions from pre-charge to fast charge, fast charge to top-off and top-off to maintenance occur independently for each cell. the configuration shown in figure 3 is for charging four cells with a current limited source of 2a. the effective average fast charge current for each cell is 2a x 0.25 x 15/16 = 0.469a. the 15/16 term is due to the fact that every 16 th charge time slot is used for negative delta-voltage and impedance testing. no current is delivered to the cell during that time. mechanical design of the holders is required to prevent insertion of more than one cell in each slot. the holder design should also prevent electrical contact with reverse polarity insertion. performance requirements over temperature and voltage 85 70 50 0 -20 -40 temperature , degres centigrade vdd, volts 4.0 5.5 full performance valid nimh charge range low temperature range high temperature range below operating voltage range abs. max operating range internal oscillators and clock generation an internal oscillator provides the main clock source used to generate timing signals for internal chip operation. the pre-charge timer, hold-off timers, and duty factors for the charging operations are derived from this timebase. there are two separate timers for the impedance test and fast charge/topoff functions.
DS2714: quad loose cell nimh charger 9 of 12 charge timer the charge timer monitors the duration of charge in fast and top-off charge phases, and is reset at the beginning of each phase. the time-out period is set with an external resistor connected from the tmr pin to v ss . resistors can be selected to support fast charge time-out periods of 0.5 to 10 hours and top-off charge time-out periods of 0.25 to 5 hours. if the timer expires in fast charge, the timer count is reset and charging proceeds to the top-off charge phase. the top-off time-out period is half of the fast charge time-out period. when the timer expires in top-off, charging proceeds to the maintenance phase. the programmed charge time approximately follows the equation: t = 1.5 * r / 1000 (time in minutes) suspend suspension of charge activity is possible by floating the tmr pin. all ccx outputs become high-z and the charge timer stops. the state machine and all timers are reset to their presence test conditions. temperature sense connecting an external 10k ? ntc thermistor between thm1 or thm2 (thmx) and vss, and a 10k ? bias resistor between v dd and thmx allows the DS2714 to sense temperature. in order to sense the temperature of the battery cells, locate the thermistor close to the body of the battery cell. the thm1 thermistor should be placed between cells 1 and 2, and thm2 thermistor between cells 3 and 4. alternatively, the thermistors can sense ambient temperature by locating them away from the cells. thm1 and thm2 can be tied together to sense temperature using a single thermistor and bias resistor. the temperature qualification function can be defeated by tying thmx pins to a single resistor divider supplying a voltage between the thermistor-min and thermistor-max threshold voltages. min, max temperature compare the voltage thresholds of the thmx inputs (vthm-min, vthm-max) are set to allow fast charging to start if 0  c < t a < 45  c when using the recommended 10k ? bias and 10k ? thermistor. if fast charging is in progress, and the voltage on thmx reaches vthm-stop (t a > 50  c), fast charging stops and the maintenance phase begins. in pre-charge the device will transition to the fault state if the voltage on thmx reaches vthm-stop. table 1. thm1, thm2 thresholds temperature thm threshold ratio of vdd thermistor resistance semitec 103at-2 fenwal 197-103lag-a01 173-103laf-301 min 0.73 27.04k 0c 4c max 0.33 4.925k 45c 42c stop 0.29 4.085k 50c 47c cell voltage monitoring individual cell voltages are monitored for minimum and maximum values, using the v bat-low , v bat-max1 and v bat- max2 threshold limits. upon inserting a cell or power-up with cells inserted, cell voltages must be less than the v bat- max1 threshold before charging begins. the v bat-low threshold determines whether a pre-charge cycle should precede the fast charge cycle, and when to transition from pre-charge to fast charge. once fast charging commences, cell voltages are compared to the v bat-max2 threshold once every 2 seconds. the comparison occurs while the charge control pin (cc1-4) controlling current to the cell is active (low). when the charge control pin is active such that charge is applied to the cell, the cell voltage is referred to as the v on voltage. when the charge control pin is inactive, the cell voltage is referred to as the v off voltage. charging is halted and a fault condition is displayed if v on is greater than v bat-max2 . charging is also halted and a fault condition is entered if v off is greater than v bat-max1 . while fast charge is in progress, cell voltage measurements are stored and compared to future measurements for charge termination and cell test purposes.
DS2714: quad loose cell nimh charger 10 of 12 cell tests two types of tests are performed to detect primary alkaline and lithium cells or defective nimh or nicd secondary cells. the first test checks the absolute closed circuit cell voltage (v on ), and the second test checks the difference in open circuit cell voltage (v off ) and (v on ). v on for each cell is compared to the vbat-max2 threshold once every 2 seconds. during fast charge, v on - v off of each cell is compared to the cell test threshold, v ctst . if v on - v off > v ctst , the cell test fails. cells are tested individually so that a single improper or defective cell can be detected quickly. v ctst is set by the resistance from the ctst pin to ground. the nominal sensitivity of 100mv is set by connecting an 80k ? ohm resistor between ctst and v ss . the impedance threshold can be set from 32mv to 400mv. the following formula approximates the setting for the impedance threshold v ctst = 8000/r (value in volts) - ? v and flat voltage termination during fast charge, -  v detection is performed by comparing successive voltage measurements for a drop of 2mv in the cell voltage. a hold-off period for -  v detection begins at the start of fast charging and prevents false termination in the first few minutes of the charge cycle. once the hold-off period expires, cell voltage measurements are acquired every 16th charge time slot (approximately 31 seconds, during the ccx off time). when a newly acquired voltage measurement is greater than any previous one, the new value is retained as the maximum value. when the cell voltage no longer increases, the maximum value is retained and compared against subsequent values. if the cell voltage drops below the -  v threshold, v -  v , (2mv typ), fast charging is terminated. if the cell voltage remains flat such that the maximum value persists for a period of 16 minutes (t flat ), fast charge terminates and top-off charging begins. top-off, pre-charge and maintenance in top-off and pre-charge modes, the charger scales the cell current to 1/16 of the dc current set by the current source, i.e, one charge pulse for every 16 main clock pulses, or one in four available time slots for a given cell. the ratio of average top-off/pre-charge current to average fast charge current is 0.286. when the charge timer expires in top-off, the charger enters maintenance and delivers 1/128 of the dc charge source current to the cells (one time slot in every 32 available to that cell). this is slightly more than 3% of the average dc fast charge current. maintenance charge remains continuous until power is removed, the cell(s) are removed or the DS2714 is cycled into and out of suspend mode by floating the tmr pin. ccx outputs the cc1 through cc4 pins operate as open-drain outputs that drive active low to connect the charge source to the nimh cells. during charge, the behavior of these outputs depends on the charge states of the cells and on how many cells have been installed. fast charge referring to the application circuit shown in figure 3, cc1 controls the pnp switch that gates current to the cell in slot 1. cc2 controls the pnp switch that gates current to the cell in slot 2, and so on. during fast charge, current is gated to each slot sequentially, with charge pulses occurring in alternating time frames. the cell in one slot charges while the others relax. each cell skips a charge pulse every 16 of its allocated charge time slots (approximately once every 31 seconds) to facilitate independent testing of the open and closed circuit cell voltages (v off and v on , respectively). since the charge regime of each cell is independent, one cell may complete a charge phase before the other without affecting the charging of the other cells. in the case of an improper or faulty cell (ex. alkaline) being inserted along with proper cells (nimh or nicd), charging of the improper cell would be stopped, while the proper cells will be charged to full.
DS2714: quad loose cell nimh charger 11 of 12 example timing diagram for the DS2714 note 1 note 2 123412341234123412341234123412341234123412341234123 cell 1 cell 2 cell 3 cell 4 n n +1 n +2 n +3 n +4 n +5 n +6 n +7 n +8 n +9 n +10 n +11 note 1: cell test time slot for cell 2. note 2: cell test time slot for cell 3. in this timing diagram, the pulses represent charge current into the individual cells. cell 1 is in precharge (the timing of pr echarge is the same as top-off). it gets one charge pulse out of every four available times slots. cell 2 is in initially in fast charge and it transitions to topoff charge during the n+7th time interval (note 1)shown in the d iagram. cell 3 is in fast charge. cell testing is performed during the interval marked note 2. this cell is not ready to go into top-of f and it resumes fast charge. cell 4 is in maintenance mode, one out of every 32 available time slots gets a charge pulse.
DS2714: quad loose cell nimh charger maxim/dallas semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a ma xim/dallas semiconductor product. no circuit patent licenses are implied. maxim/dallas semiconductor reserves the right to change the circuitry and specification s without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2006 maxim integrated products  printed usa the maxim logo is a registered trademark of maxim integrated products, inc. the dallas logo is a registered trademark of dallas semiconductor corporation. 12 of 12 ledx outputs, display mode select open-drain outputs ledx pull low to indicate charge status. when inactive, the outputs are high impedance. led1 displays the status for the cell monitored by vp1, led2 displays the status for the cell monitored by vp2 and so on. the led pins drive low in three ?blink? patterns to annunciate the charge status. table 2 summarizes the led operation in each display mode (dm0, dm1, dm2) for each charge condition. table 2. display patterns by display mode and charge activity display mode charge activity dmsel pin no battery pre/fast/top-off charging maintenance fault dm0 low hi-z low 0.80s low 0.16s hi-z 0.48s low 0.48s hi-z dm1 float hi-z low hi-z 0.16s low 0.16s hi-z dm2 high hi-z 0.80s low 0.16s hi-z low 0.16s low 0.16s hi-z package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/dallaspackinfo .)


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